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Re: [chirp_devel] Implementing Banks in CHIRP Driver
by Craig Jones 30 May '23

30 May '23

Implementing get_bank(), set_bank(), and clear_bank() in the radio class adheres to the separation-of-concerns principle by adding a level of abstraction. The radio class "owns" the memory structure, so it's in charge of the details of how it associates a memory with a bank. The BankModel class is there for the UI. The UI only cares about the fact that a memory is associated with a bank, but couldn't care less how the association is recorded in the radio's memory. BTW, did you really mean 0 through 21? Or, 0 through 20, or 1 through 21? On 5/29/2023 12:38 PM, Joseph Scanlan wrote: > Why did you choose to implement get_bank(), set_bank(), and > clear_bank() in the radio class instead of the bank model class? > > I could add this to my description instead: > > For example, with 4 banks, if we have bank capacity’s of [21, 4, > 0, 3] then memories 0 through 21 belong to Bank 1, memories 22 > through 25 belong to Bank 2, memories 26 through 28 belong to Bank > 4, and the remaining memories don’t belong to any bank. > > > With land mobile radios, the radio user can’t change much. The radio > tech programs the radios. The typical ham will fill both roles. > > When a tech uses the Icom software, they see a page for each bank and > can add, delete, move, and edit frequencies in the bank. This gives > the tech the ability to place channels in any order. They don’t see > the entire list of memories at once. > >> On May 28, 2023, at 20:21, Craig Jones via chirp_devel >> <chirp_devel(a)intrepid.danplanet.com> wrote: >> >> Do I understand correctly that you could add this to the description? >> >> For example, if the banks[16] array contains >> [2,3,5,7,0,0,0,0,0,...] then that means that memory[0:2] belong >> to Bank A, memory[2:5] belong to Bank B, memory[5:10] to C, >> memory[10:17] to D, and memory[17:] aren't in any bank. >> >> If so, that's wild, with wacky implications: >> >> * I don't see a logical location number in the mem struct, so that >> means the "Location Number" of every channel is constantly >> changing when you add/remove a channel to a bank? >> * It also means the user can't control the order of the memory >> locations? >> * At first, I was thinking that you would keep a cross-indexing >> array in your bank model which gets populated on the way in >> (download or file load) and interpreted on the way out (upload or >> save), but I guess you'll actually have to rearrange memory with >> every bank change if the UI is going to be able to keep up in >> real time. >> * BTW, if my example is correct, the "capacity" is misleading. I'd >> change it to "current_count" or current_size >> >> On 5/28/2023 2:55 PM, Joseph Scanlan wrote: >>> Here is my class description. Does it make at least a little sense >>> to someone who hasn’t spent time with the driver? >>> >>> """ >>> The Icom land mobile bank model. >>> >>> The radio stores bank capacity in an array of 16 bit, unsigned >>> integers. There is no other mapping. This implies >>> - memories in a bank are contiguous, >>> - memories in a bank are in the order that they apear in the >>> "memory" array, >>> - each memory can only be in one bank, >>> - all memories not in a bank are at the end of the "memory" array. >>> Here, "memory" array refers to the struct in "MEM_FORMAT". >>> “”" >>> >>> Do all models look the same in the banks tab? This is what I see: >>> >>> <Banks tab.png> >>> >>> Thanks for the spelling correction. >>> >>>> On May 24, 2023, at 15:00, Craig Jones via chirp_devel >>>> <chirp_devel(a)intrepid.danplanet.com> wrote: >>>> >>>> I was wondering what "capacity" meant. So, if that's just the >>>> count, where is the actual linkage between the bank and the >>>> memories? Anyway, the Anytone model I'm working on right now is the >>>> same (each mem is limited to one bank, or none): >>>> >>>> classAnytoneBankModel(chirp_common.BankModel): >>>> """ >>>> The Anytone bank model, for the radios that support it, is that >>>> a memory >>>> channel can only belong to one bank at a time. There are 10 >>>> banks (A-J >>>> with no alternate names). The mapping is done in a block of >>>> bytes that >>>> correspond to the 750 memories (one byte per memory). The >>>> possible values >>>> are 0-9 (A-J) or 15 (x0F) for "off". >>>> """ >>>> def__init__(self, radio, name="Banks", num_banks=10, num_memories=750): >>>> super(AnytoneBankModel,self).__init__(radio,name) >>>> self._bank_bounds =range(num_banks) >>>> self._mem_bounds =range(1,num_memories +1) >>>> self._banks =[ >>>> chirp_common.Bank(self,i,string.ascii_uppercase[i]) fori >>>> inself._bank_bounds >>>> ] >>>> defget_num_mappings(self): >>>> returnlen(self._banks) >>>> defget_mappings(self): >>>> returnself._banks >>>> defadd_memory_to_mapping(self, memory, bank): >>>> self._radio.set_bank(memory.number,bank.get_index()) >>>> defremove_memory_from_mapping(self, memory, mapping): >>>> self._radio.clr_bank(memory.number) >>>> defget_mapping_memories(self, bank): >>>> """Returns a list of all memories assigned to the given bank""" >>>> memories =[] >>>> fori inself._mem_bounds: >>>> bank_index =self._radio.get_bank(i) >>>> ifbank_index isnotNoneandbank_index ==bank.get_index(): >>>> memories.append(self._radio.get_memory(i)) >>>> returnmemories >>>> defget_memory_mappings(self, memory): >>>> bank_index =self._radio.get_bank(memory.number) >>>> return[]ifbank_index isNoneelse[self._banks[bank_index]] >>>> >>>> BTW, "scrabmler_code" is misspelled. >>>> >>>> >>>> On 5/24/2023 1:52 PM, Joseph Scanlan wrote: >>>>> A memory can not be in more than one bank simultaneously. >>>>> >>>>> A memory need not be in a bank. >>>>> >>>>> Memories are stored sequentially starting from [0]. Each number in banks holds the count of memories in that bank. The count can be 0. So to find the start index of the first memory in a bank we have to sum the sizes of all previous banks. >>>>> >>>>>> On May 23, 2023, at 14:06, Craig Jones via chirp_devel<chirp_devel(a)intrepid.danplanet.com> wrote: >>>>>> >>>>>> I just went through that myself. The first two questions: 1. Can one >>>>>> memory belong to multiple banks simultaneously? 2. Does every memory >>>>>> have to belong to at least one bank? The answers determine which base >>>>>> class you use for the bank model. >>>>>> >>>>>> You need to implement a bank model so that Chirp can inquire, for >>>>>> example, which memories are in bank C? >>>>>> >>>>>> You also need to implement get_bank(), set_bank(), clear_bank() for a >>>>>> memory (in the radio class), which will be called by the bank model. >>>>>> >>>>>> Hopefully, that's enough to get you started. >>>>>> >>>>>> >>>>>> On 5/23/2023 1:47 PM, Joseph Scanlan via chirp_devel wrote: >>>>>>> Does anyone have an example that will help me understand MemoryMapping, MappingModel, Bank, and BankModel classes? I’m working on a driver for the Icom IC-F520 land mobile radio. >>>>>>> >>>>>>> The F520 has 256 channels and 16 banks. This is how they look in MEM_FORMAT: >>>>>>> >>>>>>> struct { >>>>>>> u16 capacity; >>>>>>> } banks[16]; >>>>>>> >>>>>>> >>>>>>> struct { >>>>>>> char name[10]; >>>>>>> u32 inhibit:1, >>>>>>> freq_rx:31; >>>>>>> u32 inhibit_tx:1, >>>>>>> freq_tx:31; >>>>>>> u8 rx_tone_off:1, >>>>>>> rx_tone_digital:1, >>>>>>> unk01:6; >>>>>>> u8 rx_tone; >>>>>>> u8 tx_tone_off:1, >>>>>>> tx_tone_digital:1, >>>>>>> unk02:6; >>>>>>> u8 tx_tone; >>>>>>> u8 unk03:3, >>>>>>> tot_on:1, >>>>>>> lockout_repeater:1, >>>>>>> lockout_busy:1, >>>>>>> power_rf:2; >>>>>>> u8 log_in:2, >>>>>>> log_out:2, >>>>>>> unk04:1, >>>>>>> text_on:1, >>>>>>> unk05:1, >>>>>>> two_tone_unk1:1; >>>>>>> u8 unk06:4, >>>>>>> two_tone_unk2:2 >>>>>>> auto_reset_a:1, >>>>>>> unk07:1; >>>>>>> u8 narrow:1, >>>>>>> scrambler_on:1, >>>>>>> scrambler_inhibit:1, >>>>>>> compander_on:1, >>>>>>> unk08:4; >>>>>>> u8 unk09; >>>>>>> u8 scrabmler_code; >>>>>>> u16 unk10; >>>>>>> u16 unk11; >>>>>>> u8 unk12:6, >>>>>>> two_tone_index:2; >>>>>>> } memory[256]; >>>>>>> _______________________________________________ >>>>>>> chirp_devel mailing list >>>>>>> chirp_devel(a)intrepid.danplanet.com >>>>>>> http://intrepid.danplanet.com/mailman/listinfo/chirp_devel >>>>>>> Developer docs:http://chirp.danplanet.com/projects/chirp/wiki/Developers >>>>>> -- >>>>>> This email has been checked for viruses by AVG antivirus software. >>>>>> www.avg.com >>>>>> _______________________________________________ >>>>>> chirp_devel mailing list >>>>>> chirp_devel(a)intrepid.danplanet.com >>>>>> http://intrepid.danplanet.com/mailman/listinfo/chirp_devel >>>>>> Developer docs:http://chirp.danplanet.com/projects/chirp/wiki/Developers >>>> >>>> <http://www.avg.com/email-signature?utm_medium=email&utm_source=link&utm_cam…> >>>> Virus-free.www.avg.com >>>> <http://www.avg.com/email-signature?utm_medium=email&utm_source=link&utm_cam…> >>>> >>>> >>>> <x-msg://1/#DAB4FAD8-2DD7-40BB-A1B8-4E2AA1F9FDF2> >>>> _______________________________________________ >>>> chirp_devel mailing list >>>> chirp_devel(a)intrepid.danplanet.com >>>> http://intrepid.danplanet.com/mailman/listinfo/chirp_devel >>>> Developer docs: >>>> http://chirp.danplanet.com/projects/chirp/wiki/Developers >>> >> _______________________________________________ >> chirp_devel mailing list >> chirp_devel(a)intrepid.danplanet.com >> http://intrepid.danplanet.com/mailman/listinfo/chirp_devel >> Developer docs: http://chirp.danplanet.com/projects/chirp/wiki/Developers > -- This email has been checked for viruses by AVG antivirus software. www.avg.com

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Re: [chirp_devel] Implementing Banks in CHIRP Driver
by Craig Jones 28 May '23

28 May '23

Do I understand correctly that you could add this to the description? For example, if the banks[16] array contains [2,3,5,7,0,0,0,0,0,...] then that means that memory[0:2] belong to Bank A, memory[2:5] belong to Bank B, memory[5:10] to C, memory[10:17] to D, and memory[17:] aren't in any bank. If so, that's wild, with wacky implications: * I don't see a logical location number in the mem struct, so that means the "Location Number" of every channel is constantly changing when you add/remove a channel to a bank? * It also means the user can't control the order of the memory locations? * At first, I was thinking that you would keep a cross-indexing array in your bank model which gets populated on the way in (download or file load) and interpreted on the way out (upload or save), but I guess you'll actually have to rearrange memory with every bank change if the UI is going to be able to keep up in real time. * BTW, if my example is correct, the "capacity" is misleading. I'd change it to "current_count" or current_size On 5/28/2023 2:55 PM, Joseph Scanlan wrote: > Here is my class description. Does it make at least a little sense to > someone who hasn’t spent time with the driver? > > """ > > The Icom land mobile bank model. > > > The radio stores bank capacity in an array of 16 bit, unsigned > > integers. There is no other mapping. This implies > > - memories in a bank are contiguous, > > - memories in a bank are in the order that they apear in the > > "memory" array, > > - each memory can only be in one bank, > > - all memories not in a bank are at the end of the "memory" array. > > Here, "memory" array refers to the struct in "MEM_FORMAT". > > “”" > > > Do all models look the same in the banks tab? This is what I see: > > > Banks tab.png > > Thanks for the spelling correction. > >> On May 24, 2023, at 15:00, Craig Jones via chirp_devel >> <chirp_devel(a)intrepid.danplanet.com> wrote: >> >> I was wondering what "capacity" meant. So, if that's just the count, >> where is the actual linkage between the bank and the memories? >> Anyway, the Anytone model I'm working on right now is the same (each >> mem is limited to one bank, or none): >> >> classAnytoneBankModel(chirp_common.BankModel): >> """ >> The Anytone bank model, for the radios that support it, is that a >> memory >> channel can only belong to one bank at a time. There are 10 banks >> (A-J >> with no alternate names). The mapping is done in a block of bytes >> that >> correspond to the 750 memories (one byte per memory). The >> possible values >> are 0-9 (A-J) or 15 (x0F) for "off". >> """ >> def__init__(self, radio, name="Banks", num_banks=10, num_memories=750): >> super(AnytoneBankModel,self).__init__(radio,name) >> self._bank_bounds =range(num_banks) >> self._mem_bounds =range(1,num_memories +1) >> self._banks =[ >> chirp_common.Bank(self,i,string.ascii_uppercase[i]) fori >> inself._bank_bounds >> ] >> defget_num_mappings(self): >> returnlen(self._banks) >> defget_mappings(self): >> returnself._banks >> defadd_memory_to_mapping(self, memory, bank): >> self._radio.set_bank(memory.number,bank.get_index()) >> defremove_memory_from_mapping(self, memory, mapping): >> self._radio.clr_bank(memory.number) >> defget_mapping_memories(self, bank): >> """Returns a list of all memories assigned to the given bank""" >> memories =[] >> fori inself._mem_bounds: >> bank_index =self._radio.get_bank(i) >> ifbank_index isnotNoneandbank_index ==bank.get_index(): >> memories.append(self._radio.get_memory(i)) >> returnmemories >> defget_memory_mappings(self, memory): >> bank_index =self._radio.get_bank(memory.number) >> return[]ifbank_index isNoneelse[self._banks[bank_index]] >> >> BTW, "scrabmler_code" is misspelled. >> >> >> On 5/24/2023 1:52 PM, Joseph Scanlan wrote: >>> A memory can not be in more than one bank simultaneously. >>> >>> A memory need not be in a bank. >>> >>> Memories are stored sequentially starting from [0]. Each number in banks holds the count of memories in that bank. The count can be 0. So to find the start index of the first memory in a bank we have to sum the sizes of all previous banks. >>> >>>> On May 23, 2023, at 14:06, Craig Jones via chirp_devel<chirp_devel(a)intrepid.danplanet.com> wrote: >>>> >>>> I just went through that myself. The first two questions: 1. Can one >>>> memory belong to multiple banks simultaneously? 2. Does every memory >>>> have to belong to at least one bank? The answers determine which base >>>> class you use for the bank model. >>>> >>>> You need to implement a bank model so that Chirp can inquire, for >>>> example, which memories are in bank C? >>>> >>>> You also need to implement get_bank(), set_bank(), clear_bank() for a >>>> memory (in the radio class), which will be called by the bank model. >>>> >>>> Hopefully, that's enough to get you started. >>>> >>>> >>>> On 5/23/2023 1:47 PM, Joseph Scanlan via chirp_devel wrote: >>>>> Does anyone have an example that will help me understand MemoryMapping, MappingModel, Bank, and BankModel classes? I’m working on a driver for the Icom IC-F520 land mobile radio. >>>>> >>>>> The F520 has 256 channels and 16 banks. This is how they look in MEM_FORMAT: >>>>> >>>>> struct { >>>>> u16 capacity; >>>>> } banks[16]; >>>>> >>>>> >>>>> struct { >>>>> char name[10]; >>>>> u32 inhibit:1, >>>>> freq_rx:31; >>>>> u32 inhibit_tx:1, >>>>> freq_tx:31; >>>>> u8 rx_tone_off:1, >>>>> rx_tone_digital:1, >>>>> unk01:6; >>>>> u8 rx_tone; >>>>> u8 tx_tone_off:1, >>>>> tx_tone_digital:1, >>>>> unk02:6; >>>>> u8 tx_tone; >>>>> u8 unk03:3, >>>>> tot_on:1, >>>>> lockout_repeater:1, >>>>> lockout_busy:1, >>>>> power_rf:2; >>>>> u8 log_in:2, >>>>> log_out:2, >>>>> unk04:1, >>>>> text_on:1, >>>>> unk05:1, >>>>> two_tone_unk1:1; >>>>> u8 unk06:4, >>>>> two_tone_unk2:2 >>>>> auto_reset_a:1, >>>>> unk07:1; >>>>> u8 narrow:1, >>>>> scrambler_on:1, >>>>> scrambler_inhibit:1, >>>>> compander_on:1, >>>>> unk08:4; >>>>> u8 unk09; >>>>> u8 scrabmler_code; >>>>> u16 unk10; >>>>> u16 unk11; >>>>> u8 unk12:6, >>>>> two_tone_index:2; >>>>> } memory[256]; >>>>> _______________________________________________ >>>>> chirp_devel mailing list >>>>> chirp_devel(a)intrepid.danplanet.com >>>>> http://intrepid.danplanet.com/mailman/listinfo/chirp_devel >>>>> Developer docs:http://chirp.danplanet.com/projects/chirp/wiki/Developers >>>> -- >>>> This email has been checked for viruses by AVG antivirus software. >>>> www.avg.com >>>> _______________________________________________ >>>> chirp_devel mailing list >>>> chirp_devel(a)intrepid.danplanet.com >>>> http://intrepid.danplanet.com/mailman/listinfo/chirp_devel >>>> Developer docs:http://chirp.danplanet.com/projects/chirp/wiki/Developers >> >> <http://www.avg.com/email-signature?utm_medium=email&utm_source=link&utm_cam…> >> Virus-free.www.avg.com >> <http://www.avg.com/email-signature?utm_medium=email&utm_source=link&utm_cam…> >> >> >> <x-msg://1/#DAB4FAD8-2DD7-40BB-A1B8-4E2AA1F9FDF2> >> _______________________________________________ >> chirp_devel mailing list >> chirp_devel(a)intrepid.danplanet.com >> http://intrepid.danplanet.com/mailman/listinfo/chirp_devel >> Developer docs: http://chirp.danplanet.com/projects/chirp/wiki/Developers > -- This email has been checked for viruses by AVG antivirus software. www.avg.com

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Re: [chirp_devel] Implementing Banks in CHIRP Driver
by Craig Jones 24 May '23

24 May '23

I was wondering what "capacity" meant. So, if that's just the count, where is the actual linkage between the bank and the memories? Anyway, the Anytone model I'm working on right now is the same (each mem is limited to one bank, or none): classAnytoneBankModel(chirp_common.BankModel): """ The Anytone bank model, for the radios that support it, is that a memory channel can only belong to one bank at a time. There are 10 banks (A-J with no alternate names). The mapping is done in a block of bytes that correspond to the 750 memories (one byte per memory). The possible values are 0-9 (A-J) or 15 (x0F) for "off". """ def__init__(self, radio, name="Banks", num_banks=10, num_memories=750): super(AnytoneBankModel,self).__init__(radio,name) self._bank_bounds =range(num_banks) self._mem_bounds =range(1,num_memories +1) self._banks =[ chirp_common.Bank(self,i,string.ascii_uppercase[i]) fori inself._bank_bounds ] defget_num_mappings(self): returnlen(self._banks) defget_mappings(self): returnself._banks defadd_memory_to_mapping(self, memory, bank): self._radio.set_bank(memory.number,bank.get_index()) defremove_memory_from_mapping(self, memory, mapping): self._radio.clr_bank(memory.number) defget_mapping_memories(self, bank): """Returns a list of all memories assigned to the given bank""" memories =[] fori inself._mem_bounds: bank_index =self._radio.get_bank(i) ifbank_index isnotNoneandbank_index ==bank.get_index(): memories.append(self._radio.get_memory(i)) returnmemories defget_memory_mappings(self, memory): bank_index =self._radio.get_bank(memory.number) return[]ifbank_index isNoneelse[self._banks[bank_index]] BTW, "scrabmler_code" is misspelled. On 5/24/2023 1:52 PM, Joseph Scanlan wrote: > A memory can not be in more than one bank simultaneously. > > A memory need not be in a bank. > > Memories are stored sequentially starting from [0]. Each number in banks holds the count of memories in that bank. The count can be 0. So to find the start index of the first memory in a bank we have to sum the sizes of all previous banks. > >> On May 23, 2023, at 14:06, Craig Jones via chirp_devel<chirp_devel(a)intrepid.danplanet.com> wrote: >> >> I just went through that myself. The first two questions: 1. Can one >> memory belong to multiple banks simultaneously? 2. Does every memory >> have to belong to at least one bank? The answers determine which base >> class you use for the bank model. >> >> You need to implement a bank model so that Chirp can inquire, for >> example, which memories are in bank C? >> >> You also need to implement get_bank(), set_bank(), clear_bank() for a >> memory (in the radio class), which will be called by the bank model. >> >> Hopefully, that's enough to get you started. >> >> >> On 5/23/2023 1:47 PM, Joseph Scanlan via chirp_devel wrote: >>> Does anyone have an example that will help me understand MemoryMapping, MappingModel, Bank, and BankModel classes? I’m working on a driver for the Icom IC-F520 land mobile radio. >>> >>> The F520 has 256 channels and 16 banks. This is how they look in MEM_FORMAT: >>> >>> struct { >>> u16 capacity; >>> } banks[16]; >>> >>> >>> struct { >>> char name[10]; >>> u32 inhibit:1, >>> freq_rx:31; >>> u32 inhibit_tx:1, >>> freq_tx:31; >>> u8 rx_tone_off:1, >>> rx_tone_digital:1, >>> unk01:6; >>> u8 rx_tone; >>> u8 tx_tone_off:1, >>> tx_tone_digital:1, >>> unk02:6; >>> u8 tx_tone; >>> u8 unk03:3, >>> tot_on:1, >>> lockout_repeater:1, >>> lockout_busy:1, >>> power_rf:2; >>> u8 log_in:2, >>> log_out:2, >>> unk04:1, >>> text_on:1, >>> unk05:1, >>> two_tone_unk1:1; >>> u8 unk06:4, >>> two_tone_unk2:2 >>> auto_reset_a:1, >>> unk07:1; >>> u8 narrow:1, >>> scrambler_on:1, >>> scrambler_inhibit:1, >>> compander_on:1, >>> unk08:4; >>> u8 unk09; >>> u8 scrabmler_code; >>> u16 unk10; >>> u16 unk11; >>> u8 unk12:6, >>> two_tone_index:2; >>> } memory[256]; >>> _______________________________________________ >>> chirp_devel mailing list >>> chirp_devel(a)intrepid.danplanet.com >>> http://intrepid.danplanet.com/mailman/listinfo/chirp_devel >>> Developer docs:http://chirp.danplanet.com/projects/chirp/wiki/Developers >> -- >> This email has been checked for viruses by AVG antivirus software. >> www.avg.com >> _______________________________________________ >> chirp_devel mailing list >> chirp_devel(a)intrepid.danplanet.com >> http://intrepid.danplanet.com/mailman/listinfo/chirp_devel >> Developer docs:http://chirp.danplanet.com/projects/chirp/wiki/Developers

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[chirp_devel] Implementing Banks in CHIRP Driver
by Joseph Scanlan 23 May '23

23 May '23

Does anyone have an example that will help me understand MemoryMapping, MappingModel, Bank, and BankModel classes? I’m working on a driver for the Icom IC-F520 land mobile radio. The F520 has 256 channels and 16 banks. This is how they look in MEM_FORMAT: struct { u16 capacity; } banks[16]; struct { char name[10]; u32 inhibit:1, freq_rx:31; u32 inhibit_tx:1, freq_tx:31; u8 rx_tone_off:1, rx_tone_digital:1, unk01:6; u8 rx_tone; u8 tx_tone_off:1, tx_tone_digital:1, unk02:6; u8 tx_tone; u8 unk03:3, tot_on:1, lockout_repeater:1, lockout_busy:1, power_rf:2; u8 log_in:2, log_out:2, unk04:1, text_on:1, unk05:1, two_tone_unk1:1; u8 unk06:4, two_tone_unk2:2 auto_reset_a:1, unk07:1; u8 narrow:1, scrambler_on:1, scrambler_inhibit:1, compander_on:1, unk08:4; u8 unk09; u8 scrabmler_code; u16 unk10; u16 unk11; u8 unk12:6, two_tone_index:2; } memory[256];

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[chirp_devel] Is FLAKE8 line length 80 still appropriate?
by Craig Jones 21 May '23

21 May '23

Is there any particular reason why we're sticking to the FLAKE8 default of 80 character lines? The first thing I always do is change it to 160. 80 is just too tight for expressive names. Every single line ends up getting continued. Sometimes you even have to do battle with the enforced "visually pleasing" indents that can reduce the functional line length to 40 or less. -- This email has been checked for viruses by AVG antivirus software. www.avg.com

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[chirp_devel] Quansheng UV-K5 driver
by Jacek Lipkowski 21 May '23

21 May '23

Hello, I've written an experimental driver for the Quansheng UV-K5, avaliable here: https://github.com/sq5bpf/uvk5-reverse-engineering/blob/main/uvk5.py This works in chirp-next 20230515, the specifica version that i use is: CHIRP next-20230515 on Python 3.11.2 wxPython 4.2.0 gtk3 (phoenix) wxWidgets 3.2.2 Let me know if there are any issues with it (coding standards etc). I will submit a pull request later. VY 73 Jacek / SQ5BPF

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[chirp_devel] Adding columns to channel list
by Jacek Lipkowski 18 May '23

18 May '23

Hello, I have a question if it is possible to add/hide columns in the memory browser? This may be an obvious question, but i'm new to chirp development. I'm writing a driver for the Quansheng UV-K5, and this radio has a lot of features settable for every channel. I know that i can add an extra RadioSettingGroup to a channel, but it's only visible after right-clicking the channel. Now i can't expect the user to right-click every one of 200 channels to change or even see these settings. The only way i've found so far to let the users see these extra settings is to stuff them into the comment field, which is not pretty. I'm using CHIRP next-20230515 on Python 3.11.2 wxPython 4.2.0 gtk3 (phoenix) wxWidgets 3.2.2 on Debian 12 (almost-stable :). VY 73 Jacek / SQ5BPF

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[chirp_devel] Naming convention for class fields?
by Craig Jones 16 May '23

16 May '23

I'm looking over the yaesu_clone superclass with FT1D subclass as a suggested example. I'm confused by the conflicting naming conventions. In yaesu_clone.py line 231 the superclass begins with these class fields: VENDOR="Yaesu" NEEDS_COMPAT_SERIAL=False _model =b"ABCDE" Why are the first two all caps, but the third is lowercase with a leading underscore? Is this documented somewhere that I missed? Normally, a leading underscore means the variable is local to the current scope and shouldn't be accessed outside of it. But in this case, VENDOR and _model are both overridden in the subclass. I didn't think that a subclass still counts as local. Also, normally all caps means it's a constant. Yet, again, the VENDOR gets overridden. So, to my mind all of these variables should be lowercase with no leading underscore. Just "vendor", just "model". (Or, leading underscores with corresponding @property accessors.) (signed) Confused in Las Vegas 😮 -- This email has been checked for viruses by AVG antivirus software. www.avg.com

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[chirp_devel] Yaesu FT1DR, multiple comments and questions
by Declan Rieb 16 May '23

16 May '23

Hello CHIRP experts. Thanks for reading, and especially for responding to my questions in bold. 1. I’ve just found that CHIRP-next and CHIRP-source both break when I try to look at the settings data for a radio that’s new (ahem… not quite: when I use a default .ft1d file written by Yaesu’s ADMS software.) The root cause is that no data have (ever yet) been placed into the APRS section, and CHIRP effectively burps on a Null link. I’ve fixed that, I think. I also simplified some of the inheritance “differences”… The FT1, FT2 and FT3 all have 900 memories, and 99 Skip-memories and 100 PMS-memories, so changing the ft1d.py to at least define them (even if not quite handled!) seemed like a no-brainer. Question 1: How to put this branch into the regular tree? Will I need to submit an error report (issue) so I can get a case number and email you the diff file with an appropriately-referenced datum? Or, since things are still being wholesale-changed, should I just push it on up? (I’m loath to do that because y’all are very good at spotting stupid programmer errors and I’m no Python expert.) All of my other changes below will be sequential branches from this one. 2. The GM/WWIRES-X support from the ft70.py is almost drop-in compatible, so I’ve a (separate) ft1d.py that at least displays those data in a settings tab. (I’ve not tried setting them yet; most are pull-down menus.) There is more work desired to enter to support the digital rooms and categories (Yaesu’s ADMS handles those, so I think CHIRP should as well.) This work supports Feature #6151 3. I’ve yet another ft1d.py branch that handles the 99 skip-memories, 100 PMS-memories and 11 Home memories as ‘specials’. So far, they seem to be displaying correctly (yay!) This looks like the same issue as Bug #3951 but for Yaesu FT-1D, FT2D, FT-3D. - One downside for now is that there are ~1200 lines in the CHIRP output page. At least for testing purposes, most are empty, and so a LOT of scrolling is required. Is there any way to have CHIRP [optionally] display only one blank line in a row (skipping others) or to go back to the toggles for “show blanks” and “show specials”?? I can imagine having the UI become sensitive to a radio-specific parameter (e.g. rf.display_blank_lines and rf.display_specials, both set True by default but selectable by the driver and/or in the UI) I can imagine having memory output look like the following for an FT1 (Home frequencies are always set; Specials show at least first and maybe last line, even if blank) 1 freq … 2 freq … 3 (blank line) 10 freq … 11 (blank line) 900 (blank line) S1 freq … S2 (blank line) S99 (blank line) L1 (blank line) U50 (blank line) H1 0.65 H2 … H11 … Question 3a: Can I (optionally) have CHIRP hide some blank lines? - It seems that specials have an execution path that I didn’t expect. When I try to SET a regular memory, my present debug shows ‘set_memory’ is called and works fine. I’ve modified it to handle the special memories, similar to changes in ‘get_memory.’ But when I try to change a special memory, my driver's ‘set_memory’ routine isn’t called at all. Instead, I run into an error (I was able to get debug file from CHIRP_next after loading my driver module; that is attached. I had loaded an ADMS file and touched the settings button, then tried to change Skip901 special memory.) Traceback (most recent call last): File "/Users/declan/chirp/chirp/wxui/common.py", line 452, in run_safe return fn(*args, **kwargs) ^^^^^^^^^^^^^^^^^^^ File "/Users/declan/chirp/chirp/wxui/memedit.py", line 1038, in _memory_edited self._radio.validate_memory(mem)) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ File "/Users/declan/chirp/chirp/chirp_common.py", line 1227, in validate_memory return rf.validate_memory(mem) ^^^^^^^^^^^^^^^^^^^^^^^ File "/Users/declan/chirp/chirp/chirp_common.py", line 976, in validate_memory (mem.number < lo or mem.number > hi) and \ ^^^^^^^^^^^^^^^ TypeError: '<' not supported between instances of 'str' and ‘int' Now AFAICT, the ‘mem.number' that my driver gets can be either an integer (1-900 in FT1D case) or an appropriate string for the specials (e.g.’Home1’). Those names came from my specials list used to set ‘rf.valid_special_chans’ … I don’t think I ever set mem.number, but it seems as if CHIRP is using the names from my specials list (I can’t quite tell… I never put debugs into the memedit.py or chirp_common.py.) I don’t explicitly use ‘extd_number’ anywhere in my drivers. Question 3b: HOW do I correctly allow CHIRP to modify a special memory? ______ Declan Rieb WD5EQY wd5eqy(a)arrl.net

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[chirp_devel] Fwd: Yaesu FTM6000 support - not yet. Perhaps I can help?
by Stephen Hersey 16 May '23

16 May '23

(Originally posted this on chirp_users, but chirp_devel seems more appropriate...) I've used Chirp for my HTs now for many years (thanks, developers!), and recently bought a Yaesu FTM6000 dual-band mobile. Its primary deficiency from my point of view is that it isn't supported by Chirp, for which reason I bought a third-party programming program and serial cable made by RT Systems. I'm not a fan of their business model of "Spend another $60 for a different (but actually near-identical) programming utility for every one of your different radios," so I view this as a one-time thing, and a way to give back by achieving Chirp support for this model. I would be delighted to use this equipment and my embedded hardware/software development skills to bring about Chirp support for this radio, but I would need some help from someone familiar with Chirp internals. In particular, my Python skills are rudimentary; I can write Python, but it's not my best language. Implementing this support on my own seems rather daunting. Here's what I can do well: - Run test cases for reading/writing configurations from and to the radio with the third-party software - Intercept the serial data streams at either the USB driver level or the RS-232 serial link level (it's my understanding that this radio does indeed use RS-232 levels and async serial communications). Wireshark and logic analyzers are my friends! - Analyze the serial data streams for this radio and compare them to samples of known Yaesu programming protocols for other models (I believe they tend to re-use the same protocol for many models) - Compile and run test builds of a modified Chirp build from a Git repo and test them Here's what I would need help with: - Someone familiar with Python, the Chirp drivers, and ideally Yaesu's programming protocols, to work on the Python code to adapt an existing Chirp driver for the FTM6000. Is there someone on the list who would be interested in working with me on adding support for this radio to Chirp? Regards, Steve Hersey -- Steve Hersey N1XNX n1xnxham(a)gmail.com ----- "Any sufficiently advanced technology is indistinguishable from magic." -- Clarke's Third Law "Any technology distinguishable from magic is insufficiently advanced." -- Benford's Corollary "Any sufficiently advanced magic is indistinguishable from technology." -- Charles Stross, *Dead Lies Dreaming* “It's still magic even if you know how it's done.” -- Terry Pratchett

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